Dr. Yannick Hertz Pancha | Electronics | Best Scholar Award

Dr at Université de Yaoundé, Cameroon

Dr. Yannick Hertz Pancha is a highly promising early-career scholar specializing in analog and mixed-signal circuit design, with a Ph.D. in Electrical and Electronics Systems from the University of Yaoundé I, Cameroon. His academic journey reflects consistent excellence, culminating in First Honor distinction. He has contributed to the field through impactful research on CMOS readout circuits and low-power amplifier design, with publications in respected journals and presentations at international conferences. Dr. Pancha has over five years of teaching experience in analog electronics and instrumentation, actively mentoring students in both theoretical and practical settings. He is proficient in a range of technical tools and software relevant to VLSI and system-on-chip design. Recognized with the 2023 Zacharias Tanee Fomum Foundation Excellence Award, his achievements demonstrate strong scholarly potential. With continued focus on publishing, securing grants, and expanding international collaboration, Dr. Pancha stands as a suitable and deserving candidate for the Best Scholar Award.

Professional Profile 

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Education🎓

Dr. Yannick Hertz Pancha has pursued a rigorous and progressive academic path in the fields of physics and electronics. He earned his Ph.D. in Electrical and Electronics Systems from the University of Yaoundé I in January 2024, graduating with First Honor. His doctoral studies focused on analog and mixed-signal circuit design and programmable system-on-chip (SoC) devices. Prior to this, he completed a postgraduate master’s degree in physics with a specialization in electronics and instrumentation from the same university in 2019, achieving a GPA of 3.07/4. In 2016, he obtained his bachelor’s degree in physics, with a focus on electronics, also from the University of Yaoundé I. Additionally, he earned a certification in entrepreneurship from the Swiss e-Learning Institute in 2018. His educational foundation was laid with a Baccalauréat in mathematics and physical sciences in 2013. Dr. Pancha’s academic background reflects both depth in technical expertise and breadth in interdisciplinary skills.

Professional Experience📝

Dr. Yannick Hertz Pancha has accumulated significant professional experience in academia and research, primarily within the University of Yaoundé I and the University of Ebolowa. From 2019 to 2024, he served as an instructor for electronics and physics practical courses, guiding undergraduate students through hands-on experiments and circuit implementation. Between 2023 and 2024, he held temporary Assistant Lecturer positions, teaching analog electronics at both the University of Yaoundé I and the University of Ebolowa, where he delivered core theoretical concepts in electronics. He also contributed to curriculum development and provided mentorship to students in laboratory settings. Earlier, in 2019–2020, he taught electrical engineering and computer-aided design (CAD), introducing students to essential software tools such as MATLAB, Maple, Multisim, and Proteus. His practical and theoretical teaching expertise is supported by his deep knowledge of microelectronics, instrumentation, and programmable SoC devices, making him a valuable contributor to engineering education and research in Cameroon.

Research Interest🔎

Dr. Yannick Hertz Pancha’s research interests lie at the intersection of analog and mixed-signal circuit design, microelectronics, and biomedical instrumentation. He is particularly focused on the development of high-performance semiconductor detector readout circuits, essential for imaging systems such as PET (Positron Emission Tomography). His work explores innovative architectures for low-power, high-speed analog amplifiers, high-resolution ADC/DAC systems, and VLSI circuits tailored for precision applications. He is also deeply engaged in the design of CMOS-based front-end electronics for CdZnTe/CdTe sensors, aiming to improve noise reduction and signal integrity in compact systems. Dr. Pancha’s interests extend to the implementation of programmable System-on-Chip (SoC) devices, enabling real-time processing in embedded electronic systems. He is committed to advancing the field of biomedical imaging electronics and in-memory computing, where energy-efficient and compact designs are critical. His interdisciplinary approach integrates advanced circuit theory with practical engineering to develop smarter, faster, and more reliable electronic solutions.

Award and Honor🏆

Dr. Yannick Hertz Pancha has been recognized for his academic excellence and dedication to research through prestigious awards and honors. Most notably, in December 2023, he received the Zacharias Tanee Fomum Foundation Excellence Award, a distinction granted to students demonstrating exceptional academic performance during the 2022/2023 academic year. This award highlights his commitment to scholarly achievement and his contributions to the field of electrical and electronics systems. His recognition comes as a result of both his outstanding research in analog and mixed-signal circuit design and his consistent academic progression, culminating in a Ph.D. with First Honor. In addition to formal awards, Dr. Pancha has gained international exposure through competitive seminar participation, including events hosted by IIT Patna, India, and the International Centre for Theoretical Physics (ICTP) in Italy. These honors underscore his status as an emerging leader in the fields of microelectronics and biomedical instrumentation.

Research Skill🔬

Dr. Yannick Hertz Pancha possesses a robust set of research skills that span theoretical understanding, practical application, and advanced circuit design. His expertise lies in analog and mixed-signal integrated circuit (IC) design, with a focus on developing high-speed, low-power solutions for biomedical and instrumentation applications. He is proficient in designing and simulating circuits for semiconductor detector readout, ADC/DAC systems, and low-noise amplifiers, using tools such as LTspice, Electric VLSI, and MATLAB. Dr. Pancha is skilled in implementing CMOS architectures tailored for CdZnTe/CdTe sensors, which are essential in medical imaging technologies like PET. He also demonstrates strong capabilities in using programmable System-on-Chip (SoC) devices, enabling efficient signal processing and system integration. His familiarity with CAD tools and simulation environments, along with hands-on experience in laboratory prototyping and testing, allows him to translate innovative concepts into functional circuits. These skills make him a valuable asset in advancing research in microelectronics and instrumentation.

Conclusion💡

Yannick Hertz Pancha demonstrates strong academic merit, focused research excellence in analog/mixed-signal electronics, and a growing international scholarly presence. His recent Ph.D. distinction, specialized research in high-impact areas like PET sensor readout and CMOS front-end electronics, and practical teaching roles support his suitability for the “Best Scholar Award.”

Publications Top Noted✍️

1. Title: A PVT power immune compact 65 nm CMOS CSP design with a leakage current compensation feedback for CdZnTe/CdTe sensors dedicated to PET applications

   • Authors: P. Yannick Hertz, F. Kamdem Jerome, N. Sidze Laure Vanessa, et al.

   • Journal: International Journal of Circuit Theory and Applications, 50(6), 1817–1833

   • Year: 2022

   • Citations: 6

2. Title: A TV-Module for DC-Baseline Compensation in Analog Front-End Design

   • Authors: P.Y. Hertz, F.K. Jerome, W.T. Evariste, E.Z. Bernard, M.A.S. Bhuiyan, M.H. Miraz

   • Conference: 2022 International Conference on Computing, Networking, Telecommunications and Engineering Sciences Applications (CoNTESA)

   • Year: 2022

   • Citations: 4

3. Title: CMOS readout FEE based TV-BLR module for CdZnTe pixel detectors in high count rate applications

   • Authors: P.Y. Hertz, F.K. Jerome, N.S.L. Vanessa, W.T. Evariste, E.Z. Bernard, et al.

   • Journal: Ain Shams Engineering Journal, 15(1), Article 102303

   • Year: 2024

   • Citations: 2

4. Title: An Enhanced StrongArm Dynamic Latch Comparator for Low-Power and High-Speed Applications

   • Authors: N.S.L. Vanessa, P.Y. Hertz, W.T. Evariste, F.K. Jerome, E.Z. Bernard

   • Journal: Journal of Circuits, Systems and Computers

   • Year: 2025

   • Citations: 1

5. Title: A 11 fJ/comp, 10 GHz StrongArm comparator in 65 nm CMOS for high-speed application

   • Authors: P.Y. Hertz, W.T. Evariste, E.Z. Bernard

   • Journal: AEU – International Journal of Electronics and Communications

   • Year: 2025